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AS5510 linear hall sensor with i2c output www.ams.com/AS5510 revision 0.1 1 - 18 1 general description the AS5510 is a linear hall sensor with 10 bit resolution and i2c interface. it can measure absolute position of lateral movement of a simple 2-pole magnet. depending on the magnet size, a lateral stroke of 0.5~2mm can be measured with air gaps around 1.0mm. to conserve power, the AS5510 may be switched to a power down state when it is not used.it is available in a wlcsp package and qualified for an ambient temperature range from -30c to +85c. 2 key features ?? 10bit resolution ?? i2c interface ?? power down mode ?? programmable sensitivity 3 applications the AS5510 is ideal for: ?? position sensing ?? servo drive feedback ?? camera lens control ?? closed loop position control. figure 1. linear position sensor with AS5510 + magnet n s magnet AS5510 pcb figure 2. block diagram vdd vss biasing & reference test offset compensation factory gain trim scl i 2 c sda power down dsp adr adc 10 bit buffer & filter front end
www.ams.com/AS5510 revision 0.1 2 - 18 AS5510 datasheet - contents contents 1 general description ......................................................................................................... ......................................................... 1 2 key features................................................................................................................ ............................................................. 1 3 applications................................................................................................................ ............................................................... 1 4 pin assignments ............................................................................................................. .......................................................... 3 4.1 pin descriptions.......................................................................................................... .......................................................................... 3 5 absolute maximum ratings .................................................................................................... .................................................. 4 6 electrical characteristics.................................................................................................. ......................................................... 5 6.1 dc characteristics for digital inputs and outputs ......................................................................... ....................................................... 5 6.1.1 cmos input: adr ......................................................................................................... .............................................................. 5 6.1.2 cmos i2c: sda, scl...................................................................................................... ............................................................ 5 6.2 electrical and magnetic specifications .................................................................................... ............................................................. 6 7 detailed description........................................................................................................ .......................................................... 7 7.1 typical application....................................................................................................... ......................................................................... 7 7.2 i2c interface............................................................................................................. ............................................................................. 7 7.2.1 i2c interface data ...................................................................................................... .................................................................. 8 7.3 i2c modes ................................................................................................................. ............................................................................ 9 7.4 sda, scl input filters .................................................................................................... ................................................................... 12 7.5 register map and description .............................................................................................. .............................................................. 12 8 package drawings and markings ............................................................................................... ............................................ 14 8.1 chip scale package 1.4 x 1.1mm ............................................................................................ .......................................................... 14 8.2 package dimensions........................................................................................................ .................................................................. 14 8.3 recommended footprint ..................................................................................................... ............................................................... 15 9 ordering information........................................................................................................ ....................................................... 17
www.ams.com/AS5510 revision 0.1 3 - 18 AS5510 datasheet - pin assignments 4 pin assignments figure 3. pin configuration of AS5510 (top view) note: the AS5510 is available in a 6-pin chip scale package with a ball pitch of 400 m. 4.1 pin descriptions table 1. pin description pin name pin number pin type description vss a1 supply pin negative supply pin, analog and digital ground adr a2 digital input i2c address selection pin connect to either vss (56h) or vdd (57h) vdd a3 supply pin positive supply pin. a capacitor of 100nf should be connected to this pin and vss sda b1 digital input / digital output open drain i2c data i/o, 20ma driving capability scl b2 digital input i2c clock test b3 digital input/output test pin, must be connec ted to vss during operation a b 3 2 1 sda adr scl vdd test vss pin a1 indicator
www.ams.com/AS5510 revision 0.1 4 - 18 AS5510 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 5 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 2. absolute maximum ratings parameter min max units comments dc supply voltage at pin vdd -0.3 5 v input pin voltage -0.3 vdd +0.3 v input current (latchup immunity) -100 100 ma norm: jedec 78 electrostatic discharge 2 kv norm: mil 883 e method 3015 storage temperature -55 +125 c body temperature (lead-free package) t body +260 c the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/ jedec j-std-020?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?. humidity non-condensing 5 85 % moisture sensitive level 1 represents a max. floor life time of unlimited
www.ams.com/AS5510 revision 0.1 5 - 18 AS5510 datasheet - electrical characteristics 6 electrical characteristics 6.1 dc characteristics for di gital inputs and outputs 6.1.1 cmos input: adr note: operating conditions: t amb = -30c to +85c, vdd = 2.5v to 3.6v (3v operation) unless otherwise noted. 6.1.2 cmos i2c: sda, scl table 3. operating conditions symbol parameter conditions min typ max units vdd supply voltage at pin vdd 2.5 3 3.6 v i supp supply current @ 25c ambient temperature 3.5 ma i pd power down current 25 a t amb ambient temperature -30 85 c table 4. electrical characteristics adr input symbol parameter conditions min typ max units v ih high level input voltage 0.7 * vdd vdd v v il low level input voltage 0 0.3 * vdd v i leak input leakage current -1 1 a table 5. electrical characteristics i2c symbol parameter conditions min typ max units v il low-level input voltage -0.5 0.3 * vdd v v ih high-level input voltage 0.7 * vdd vdd +0.5v v v hys hysteresis of schmitt trigger inputs vdd > 2.5v 0.05 * vdd v v ol low-level output voltage (open-drain or open-collector) at 3ma sink current vdd > 2.5v 0.4v v i ol low-level output current vol = 0.4v 20 ma t of output fall time from v ihmax to v ilmax 120 1 1. in fast-mode plus, fall time is specified the same for both output stage and bus timing. if series resistors are used this ha s to be consid- ered for bus timing. ns t sp pulse width of spikes that must be suppressed by the input filter 50 2 2. input filters on the sda and scl inputs suppress noise spikes of less than 50 ns. ns i i input current at each i/o pin -10 +10 3 3. i/o pins of fast-mode and fast-mode plus devices must not obstruct the sda and scl lines if vdd is switched off. a c b total capacitive load for each bus line 550 pf c i/o i/o capacitance (sda, scl) 4 4. special purpose devices such as multiplexers and switches may exceed this capacitance due to the fact that they connect multi ple paths together. note: operating conditions: t amb = -30c to +85c, vdd = 2.5v to 3.6v (3v operation) unless otherwise noted. 10 pf
www.ams.com/AS5510 revision 0.1 6 - 18 AS5510 datasheet - electrical characteristics 6.2 electrical and magnetic specifications table 6. electrical and magnetic specifications symbol parameter conditions min typ max units res resolution 10 bit bin magnetic input range default setting 50 mt configurable via i2c or factory trimming option 25 mt 12.5 mt 18.75 mt offset inp input related offset 1 1. offset inp = 0.35mt residual offset + 0.1mt earth magnetic field. 0.45 mt linearity error 2 2. linearity error= 3% t pwrup initial power up time from cold start 3 3. this time is needed for the first power-up of the device until the offset compensation is finished; includes readout of the p prom fuses; it depends on the sensitivity setting. this time is needed for the first power-up of the device until the offset compensation is finished; includes readout of the pprom fuses 1.5 ms t pwron power-on time 4 4. time after switching from power-down mode into active mode until the offset compensation is finished. time after switching from power- down mode into active mode until the offset compensation is finished 250 s fast mode (default setting) f s adc sampling frequency after offset compensation finished 50 khz t delay system propagation delay 20 s noise inp input related noise 5 5. input related noise (noise inp ) is the repeatability of the measurement. equivalent to 8 * rms 0.8 mtpp slow mode (i2c command option) f s adc sampling frequency after offset compensation finished 12.5 khz t delay system propagation delay 50 s noise inp input related noise 5 equivalent to 8 * rms 0.5 mtpp lin error ? 1 adc out maxb () ? adc ? out zerob () ? 2 adc out maxb 2 -------------- ?? ?? ? adc ? out zerob () ? ?? ?? ------------------------------------------------------------------------------------------------------------- ?? ?? ?? ?? ?? 100 ? =
www.ams.com/AS5510 revision 0.1 7 - 18 AS5510 datasheet - detailed description 7 detailed description 7.1 typical application figure 4. typical application 7.2 i2c interface the AS5510 includes an i2c slave according to the nxp specification um10204. ?? 7-bit slave address 101011x , the last address bit x is set by the adr pin (0 or 1) ?? random/sequential read ?? byte/page write ?? fast-mode plus with 20ma sda drive strength ?? internal hold time of 120ns for sda signal is included (start/stop detection) not implemented: ?? 10-bit slave address ?? clock stretching ?? general call address ?? general call ? software reset ?? read of device id AS5510 #1 i2c addr = 56h vdd vss 100nf test scl sda adr microcontroller AS5510 #2 i2c addr = 57h 100nf vdd = 2.5 ~ 3.6v vdd vss test scl sda adr 100nf vdd vdd vdd i2c interface scl sda 2.7 ~ 10k
www.ams.com/AS5510 revision 0.1 8 - 18 AS5510 datasheet - detailed description the communication from the AS5510 includes: ?? reading the magnetic field strength in 10-bit data ?? reading the status bits note: the i2c address of the chip is selected by hardware (pin adr). depending on the state of this pin, the i2c address is either pin adr = low ? i2c address = 1010110b(56h) pin adr = high ? i2c address = 1010111b(57h) 7.2.1 i2c interface data note: operating conditions t amb = -30 to +85c, vdd=2.5 to 3.6v (3v operation) unless otherwise noted. table 7. i2c timings symbol parameter conditions min typ max units f sclk scl clock frequency 1 mhz t buf bus free time; time between stop and start condition 0.5 s t hd.sta hold time; (repeated) start condition 1 1. after this time the first clock is generated 0.26 s t low low period of scl clock 0.5 s t high high period of scl clock 0.26 s t su.sta setup time for a repeated start condition 0.26 s t hd.dat data hold time 2 2. a device must internally provide a hold time of at least 120ns (fast-mode plus) for the sda signal (referred to the v ihmin of the scl) to bridge the undefined region of the falling edge of scl. 0.45 s t su.dat data setup time 3 3. a fast-mode device can be used in standard-mode system, but the requirement t su.dat = 250ns must then be met. this is automatically the case if the device does not stretch the low period of the scl signal. if such a device does stretch the low period of the s cl sig- nal, it must output the next data bit to the sda line t rmax + t su.dat = 1000 + 250 = 1250ns before the scl line is released. 50 ns t r rise time of sda and scl signals 120 ns t f fall time of sda and scl signals 4 4. in fast-mode plus, fall time is specified the same for both output stage and bus timing. if series resistors are used this ha s to be consid- ered for bus timing. 120 ns t su.sto setup time for stop condition 0.26 s
www.ams.com/AS5510 revision 0.1 9 - 18 AS5510 datasheet - detailed description figure 5. i2c timing diagram 7.3 i2c modes the AS5510 supports the i2c bus protocol. a device that sends data onto the bus is defined as a transmitter and a device receiv ing data as a receiver. the device that controls the message is called a master. the devices that are controlled by the master are referred t o as slaves. a master device that generates the serial clock (scl), controls the bus access and generates the start and stop conditions must c ontrol the bus. the AS5510 operates as a slave on the i2c bus. within the bus specifications a standard mode (100 khz maximum clock rate) a fast mode (400 khz maximum clock rate) and fast mode plus (1mhz maximum clock rate) are defined. the AS5510 works in all three modes. con nections to the bus are made through the open-drain i/o lines sda and the input scl. clock stretching is not included. the following bus protocol has been defined: ?? data transfer may be initiated only when the bus is not busy. ?? during data transfer, the data line must remain stable whenever the clock line is high. changes in the data line while the cloc k line is high are interpreted as start or stop signals. accordingly, the following bus conditions have been defined: bus not busy. both data and clock lines remain high. start data transfer. a change in the state of the data line, from high to low, while the clock is high, defines a start condition. stop data transfer. a change in the state of the data line, from low to high, while the clock line is high, defines the stop condition. data valid. the state of the data line represents valid data when, after a start condition, the data line is stable for the duration of the high period of the clock signal. the data on the line must be changed during the low period of the clock signal. there is one clock pulse per bit of data. each data transfer is initiated with a start condition and terminated with a stop condition. the number of data bytes tra nsferred between start and stop conditions are not limited, and are determined by the master device. the information is transferred byte -wise and each receiver acknowledges with a ninth bit. acknowledge. each receiving device, when addressed, is obliged to generate an acknowledge bit after the reception of each byte. the master device must generate an extra clock pulse that is associated with this acknowledge bit.a device that acknowledges must p ull down the sda line during the acknowledge clock pulse in such a way that the sda line is stable low during the high period of the acknowl edge-related clock pulse. of course, setup and hold times must be taken into account. a master must signal an end of read access to the slav e by not generating an acknowledge bit on the last byte that has been clocked out of the slave. in this case, the slave must leave the d ata line high to enable the master to generate the stop condition. sda scl start stop t buf t low t r t hd.sta t high t f t su.dat t su.sta t hd.sta t su.sto repeated start t hd.dat
www.ams.com/AS5510 revision 0.1 10 - 18 AS5510 datasheet - detailed description figure 6. data read (write pointer, then read) - slave receive and transmit depending upon the state of the r/w bit, two types of data transfer are possible: data transfer from a master transmitter to a slave receiver. the first byte transmitted by the master is the slave address, followed by r/w = 0. next follows a number of data bytes. the slave returns an acknowledge bit after each received byte. if the slave does not understand the command or data it sends a ?not acknowledge?. data is transferred with the most significant bit (msb) first. data transfer from a slave transmitter to a master receiver. the master transmits the first byte (the slave address). the slave then returns an acknowledge bit, followed by the slave transmitting a number of data bytes. the master returns an acknowledge bit af ter all received bytes other than the last byte. at the end of the last received byte, a ?not acknowledge? is returned. the master device genera tes all of the serial clock pulses and the start and stop conditions. a transfer is ended with a stop condition or with a repeated start condition. s ince a repeated start condition is also the beginning of the next serial transfer, the bus is not released. data is transferred with t he most significant bit (msb) first. the AS5510 can operate in the following two modes: slave receiver mode (write mode). serial data and clock are received through sda and scl. each byte is followed by an acknowledge bit (or by a not acknowledge depending on the address-pointer pointing to a valid position). start and stop conditions are reco gnized as the beginning and end of a serial transfer. address recognition is performed by hardware after reception of the slave address and d irection bit (see figure 7 ). the slave address byte is the first byte received after the start condition. the slave address byte contains the 7-bit as551 0 address. the 7-bit slave address is followed by the direction bit (r/w), which, for a write, is 0. after receiving and decoding the slav e address byte the device outputs an acknowledge on the sda. after the AS5510 acknowledges the slave address + write bit, the master transmits a r egister address to the AS5510. this sets the address pointer on the AS5510. if the address is a valid readable address the AS5510 answe rs by sending an acknowledge. if the address-pointer points to an invalid position a ?not acknowledge? is sent. the master may then transmit zero or more bytes of data. in case of the address pointer pointing to an invalid address the received data are not stored. the address poin ter will increment after each byte transferred independent from the address being valid. if the address-pointer reaches a valid position again, th e AS5510 answers with an acknowledge and stores the data. the master generates a stop condition to terminate the data write. 1 ... 1 9 8 7 6 ... 29 8 7 sda scl start condition stop condition or repeated start condition msb r/w ack lsb ack slave address repeated if more bytes are transferred
www.ams.com/AS5510 revision 0.1 11 - 18 AS5510 datasheet - detailed description figure 7. data write - slave receiver mode slave transmitter mode (read mode). the first byte is received and handled as in the slave receiver mode. however, in this mode, the direction bit indicates that the transfer direction is reversed. serial data is transmitted on sda by the AS5510 while the seri al clock is input on scl. start and stop conditions are recognized as the beginning and end of a serial transfer ( figure 8 and figure 9 ). the slave address byte is the first byte received after the master generates a start condition. the slave address byte contains the 7-bit AS5510 addre ss. the 7-bit slave address is followed by the direction bit (r/w), which, for a read, is 1. after receiving and decoding the slave address b yte the device outputs an acknowledge on the sda line. the AS5510 then begins to transmit data starting with the register address pointed to b y the register pointer. if the register pointer is not written to before the initiation of a read mode the first address that is read is the l ast one stored in the register pointer. the AS5510 must receive a ?not acknowledge? to end a read. figure 8. data read (from current pointer location) - slave transmitter mode s 1010110 0 a xxxxxxxx a xxxxxxxx a xxxxxxxx na s ? start a ? acknowledge (ack) data transferred: x+1 bytes + acknowledge p ? stop p xxxxxxxx a s 1010110 1 a xxxxxxxx a xxxxxxxx a xxxxxxxx na s ? start a ? acknowledge (ack) data transferred: x+1 bytes + acknowledge na ? not acknowledge (nack) note: last data byte is followed by nack p ? stop p xxxxxxxx a
www.ams.com/AS5510 revision 0.1 12 - 18 AS5510 datasheet - detailed description figure 9. data read (write pointer, then read) - slave receive and transmit automatic increment of address pointer. the AS5510 slave automatically increments the address pointer after each byte transferred. the increase of the address pointer is independent from the address being valid or not. invalid addresses. if the user sets the address pointer to an invalid address, the address byte is not acknowledged. nevertheless a read or write cycle is possible. the address pointer is increased after each byte. reading. when reading from a wrong address, the AS5510 slave returns all zero. the address pointer is increased after each byte. sequent ial read over the whole address range is possible including address overflow. write. a write to a wrong address is not acknowledged by the AS5510 slav e, although the address pointer is increased. when the address pointer points to a valid address again, a successful write accessed is acknowledged. page write over the whole address range i s possible including address overflow. 7.4 sda, scl input filters input filters for sda and scl inputs are included to suppress noise spikes of less than 50ns. furthermore the sda line is delay ed by 120ns to provide an internal hold time for start/stop detection to bridge the undefined region of the falling edge of scl. the delay nee ds to be smaller than t hd.sta 260ns. for standard-mode and fast-mode an internal hold time of 300ns is required, which is not covered by the AS5510 slave. 7.5 register map and description table 8. register map register address bit access type 7 6 5 4 3 2 1 0 00h d7 d6 d5 d4 d3 d2 d1 d0 r 01h ocf parity (even) d9 d8 r 02h fast(0) slow mode (1) polarity(0) pd(0) r/w 03h offs7 offs6 offs5 offs4 offs3 offs2 offs1 offs0 r/w 04h offs9 offs8 r/w 05h reserved for factory testing r/w 06h 07h 0bh sens 1 sens 0 r/w s 1010110 0 a xxxxxxxx a 1010110 1 xxxxxxxx a s ? start sa ? repeated start a ? acknowledge (ack) data transferred: x+1 bytes + acknowledge na ? not acknowledge (nack) note: last data byte is followed by nack p ? stop p xxxxxxxx a sr a xxxxxxxx na
www.ams.com/AS5510 revision 0.1 13 - 18 AS5510 datasheet - detailed description table 9. register description register address name description 00h, 01h d9 to d0 10 bit adc output value that corresponds to the magnetic field input 01h parity even parity bit calculated from d9 to d0 01h ocf offset compensation loop status 0 = offset compensation loop in use 1 = offset compensation loop has finished 02h pd power down mode 0 = normal operation (default) 1 = power down mode. 02h polarity output signal polarity 0 = normal polarity (default) 1 = reversed polarity (reversed magnet) 02h fast / slow mode 0 = fast mode (default) 1 = slow mode. enables averaging of the output values (reduced noise, better repeatability slower sampling frequency. see section 6.2 03h, 04h offs9 to offs0 10 bit value of the offset compensation. this register is factory trimmed 05h, 06h, 07h test these registers are reserved for factory testing 0bh sensitivity sensitivity setting 0h = input range 50mt ? sensitivity = 97.66t/lsb (default) 1h = input range 25mt ? sensitivity = 48.83t/lsb 2h = input range 12.5mt ? sensitivity = 24.41t/lsb 3h = input range 18.75mt ? sensitivity = 36.62t/lsb
www.ams.com/AS5510 revision 0.1 14 - 18 AS5510 datasheet - package drawings and markings 8 package drawings and markings 8.1 chip scale p ackage 1.4 x 1.1mm figure 10. 6-pin wl-csp 1.4 x 1.1mm 8.2 package dimensions figure 11. package dimensions xxxx device number top view bottom view side view notes: 1. ccc coplanarity 2. all dimensions in m
www.ams.com/AS5510 revision 0.1 15 - 18 AS5510 datasheet - package drawings and markings 8.3 recommended footprint figure 12. recommended footprint x0 x1 x x0 x1 y y0 y0 y1 d package dimensions symbol typ unit x1460 m x0 330 x1 400 y1100 y0 350 y1 400 d270
www.ams.com/AS5510 revision 0.1 16 - 18 AS5510 datasheet - revision history revision history note: typos may not be explicitly mentioned under revision history. revision date owner description 0.1 27 jan, 2012 rph initial revision
www.ams.com/AS5510 revision 0.1 17 - 18 AS5510 datasheet - ordering information 9 ordering information the devices are available as the standard products shown in table 10 . d......temperature range: -30c to +85c wl...package: wl-csp wafer level - chip scale package t......delivery form: tape & reel note: all products are rohs compliant and ams green. buy our products or get free samples online at www.ams.com/icdirect technical support is available at www.ams.com/technical-support for further information and requests, email us at sales@ams.com (or) find your local distributor at www.ams.com/distributor table 10. ordering information model description delivery form package AS5510 dwlt linear hall sensor tape & reel 6pin wl-csp 1.4 x 1.1mm
www.ams.com/AS5510 revision 0.1 18 - 18 AS5510 datasheet - copyrights copyrights copyright ? 1997-2012, ams ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registered ?. all right s reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written con sent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by ams ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. ams ag makes no warranty, express, statutory, implied, or by description rega rding the information set forth herein or regarding the freedom of the described devices from patent infringement. ams ag reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with ams ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliabi lity applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without addi tional processing by ams ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the stan dard production flow, such as test flow or test location. the information furnished here by ams ag is believed to be correct and accurate. however, ams ag shall not be liable to recipien t or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruptio n of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, perfo rmance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of ams ag rendering of technical or other services. contact information headquarters ams ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel : +43 (0) 3136 500 0 fax : +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.ams.com/contact

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